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Other titre : Électronique frontale intégrée pour le RatCAP

dc.contributor.advisorFontaine, Réjeanfr
dc.contributor.advisorLecomte, Rogerfr
dc.contributor.advisorO'Connor, Paulfr
dc.contributor.authorPratte, Jean-Francoisfr
dc.date.accessioned2014-05-15T12:32:47Z
dc.date.available2014-05-15T12:32:47Z
dc.date.created2008fr
dc.date.issued2008fr
dc.identifier.isbn9780494426890fr
dc.identifier.urihttp://savoirs.usherbrooke.ca/handle/11143/1833
dc.description.abstractThe Center for Translational Neuroimaging of the Brookhaven National Laboratory has been studying the phenomenon of addiction, which has a direct impact on millions of people worldwide. This requires the development of new radiotracers for imaging specific neurotransmitter systems in the brain, and the design and implementation of novel imaging devices to measure the neuroactivity of the brain. The RatCAP, or Rat Conscious Animal Positron Emission Tomography (PET), is a head-mounted miniature PET scanner for brain metabolism imaging of awake rats with minimal mobility restriction to enable correlation with the animal's behavior. The RatCAP detector is based on LSO scintillator crystals and avalanche photodiode (APD) arrays. The design of the RatCAP imposed stringent requirements on the readout electronics. First, due to its size and limited power budget, VLSI of the front-end electronics was mandatory. Second, due to the weak signal to noise ratio from the APD detectors, the analog front-end noise had to be minimized, within the power budget, to provide the best possible timing resolution. Finally, the number of interconnections with the data acquisition system had to be minimal in order to maximize the animal's mobility. This thesis presents the design and implementation of the ASIC for the RatCAP. The final ASIC integrates 32 channels consisting of a charge sensitive preamplifier, programmable gain, a bipolar shaping amplifier, and timing and energy discriminators. A novel 32-to-1 address and timing serial encoder is integrated on-chip to multiplex the acquired data through a single output. The ASIC was realized in 0.18 [mu]m CMOS technology from TSMC, has a size of 3.3 mm × 4.5 mm, and power consumption of 117 mW. The ASIC is fully operational. Noise characterization led to a measured equivalent noise charge of 650 electrons rms with the APD biased at the input. A coincidence timing resolution of 6.7 ns FWHM was measured between two typical LSO-APD-ASIC modules using a 68 Ge source (threshold at 420 keV). An energy resolution of 18.7% FWHM at 511 keV was measured for a 68 Ge source. The ASIC and the technology developed for the RatCAP have opened the door to the realization of many other systems, such as a PET-MRI scanner, and led to the granting of three patents and the publication of numerous scientific presentations.fr
dc.language.isoengfr
dc.publisherUniversité de Sherbrookefr
dc.rights© Jean-François Prattefr
dc.titleThe RatCAP front-end electronicsfr
dc.title.alternativeÉlectronique frontale intégrée pour le RatCAPfr
dc.typeThèsefr
tme.degree.disciplineGénie électriquefr
tme.degree.grantorFaculté de géniefr
tme.degree.levelDoctoratfr
tme.degree.namePh.D.fr


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