Abstract : The development of metallic single electron transistor (SET) depends on the downscaling and the electrical properties of its tunnel junctions. These tunnel junctions should insure high tunnel current levels, low thermionic current, and low capacitance. The authors use atomic layer deposition to fabricate Al2O3 and HfO2 thin layers. Tunnel barrier engineering allows the achievement of low capacitance Al2O3 and HfO2 tunnel junctions using optimized annealing and plasma exposure conditions. Different stacks were designed and fabricated to increase the transparency of the tunnel junction while minimizing thermionic current. This tunnel junction is meant to be integrated in SET to enhance its electrical properties (e.g., operating temperature, ION/IOFF ratio).